ASIC Architecture Development Begins

Lokotech Group has initiated the architecture design phase for its advanced ASIC chip, targeting both Scrypt algorithm mining and future AI inference capabilities.

The dual-purpose architecture represents a strategic decision to future-proof the company's silicon investment. While the primary focus remains on delivering best-in-class mining performance, the chip's compute cores are being designed with the flexibility to support edge AI workloads.

The architecture development is being led by Lokotech's in-house semiconductor design team, with support from specialized design partners for verification and physical implementation.

This development phase is expected to take approximately 12 months, with tape-out and prototype fabrication targeted for late 2024.

Lokotech Group has initiated the architecture design phase for its advanced ASIC chip, targeting both Scrypt algorithm mining and future AI inference capabilities.

The architecture development is being led by Lokotech's in-house semiconductor design team, with support from specialized design partners for verification and physical implementation.

This development phase is expected to take approximately 12 months, with tape-out and prototype fabrication targeted for late 2024.